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 SEMICONDUCTOR TECHNICAL DATA
Order this document by MRF174/D
The RF MOSFET Line
RF Power Field Effect Transistor
N-Channel Enhancement-Mode
Designed primarily for wideband large-signal output and driver stages up to 200 MHz frequency range. * Guaranteed Performance at 150 MHz, 28 Vdc Output Power = 125 Watts Minimum Gain = 9.0 dB Efficiency = 50% (Min) * Excellent Thermal Stability, Ideally Suited For Class A Operation * Facilitates Manual Gain Control, ALC and Modulation Techniques * 100% Tested For Load Mismatch At All Phase Angles With 30:1 VSWR * Low Noise Figure -- 3.0 dB Typ at 2.0 A, 150 MHz
D
MRF174
125 W, to 200 MHz N-CHANNEL MOS BROADBAND RF POWER FET
G S CASE 211-11, STYLE 2
MAXIMUM RATINGS
Rating Drain-Source Voltage Drain-Gate Voltage (RGS = 1.0 M) Gate-Source Voltage Drain Current -- Continuous Total Device Dissipation @ TC = 25C Derate above 25C Storage Temperature Range Operating Junction Temperature Symbol VDSS VDGR VGS ID PD Tstg TJ Value 65 65 40 13 270 1.54 - 65 to +150 200 Unit Vdc Vdc Vdc Adc Watts W/C C C
THERMAL CHARACTERISTICS
Characteristic Thermal Resistance, Junction to Case Symbol RJC Max 0.65 Unit C/W
Handling and Packaging -- MOS devices are susceptible to damage from electrostatic charge. Reasonable precautions in handling and packaging MOS devices should be observed.
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ELECTRICAL CHARACTERISTICS (TC = 25C unless otherwise noted.)
Characteristic Symbol Min Typ Max Unit
OFF CHARACTERISTICS
Drain-Source Breakdown Voltage (VGS = 0, ID = 50 mA) Zero Gate Voltage Drain Current (VDS = 28 V, VGS = 0) Gate-Source Leakage Current (VGS = 20 V, VDS = 0) V(BR)DSS IDSS IGSS 65 -- -- -- -- -- -- 10 1.0 Vdc mAdc Adc
ON CHARACTERISTICS
Gate Threshold Voltage (VDS = 10 V, ID = 100 mA) Forward Transconductance (VDS = 10 V, ID = 3.0 A) VGS(th) gfs 1.0 1.75 3.0 2.5 6.0 -- Vdc mhos
DYNAMIC CHARACTERISTICS
Input Capacitance (VDS = 28 V, VGS = 0, f = 1.0 MHz) Output Capacitance (VDS = 28 V, VGS = 0, f = 1.0 MHz) Reverse Transfer Capacitance (VDS = 28 V, VGS = 0, f = 1.0 MHz) Ciss Coss Crss -- -- -- 175 190 40 -- -- -- pF pF pF
FUNCTIONAL CHARACTERISTICS (Figure 1)
Noise Figure (VDD = 28 Vdc, ID = 2.0 A, f = 150 MHz) Common Source Power Gain (VDD = 28 Vdc, Pout = 125 W, f = 150 MHz, IDQ = 100 mA) Drain Efficiency (VDD = 28 Vdc, Pout = 125 W, f = 150 MHz, IDQ = 100 mA) Electrical Ruggedness (VDD = 28 Vdc, Pout = 125 W, f = 150 MHz, IDQ = 100 mA, VSWR 30:1 at all Phase Angles) NF Gps No Degradation in Output Power -- 9.0 50 3.0 11.8 60 -- -- -- dB dB %
L4 R2 BIAS ADJUST R3 C9 + - C10 D1 C12 R1 C11 C14 C13 + VDD = 28 V -
RFC1 R4 C3 RF INPUT L1 C1 C2 C4 L2 C5 DUT L3 C6 C7 C8 RF OUTPUT
C1 -- 15 pF Unelco C2 -- Arco 462, 5.0 - 80 pF C3 -- 100 pF Unelco C4 -- 25 pF Unelco C6 -- 40 pF Unelco C7 -- Arco 461, 2.7 - 30 pF C5, C8 -- Arco 463, 9.0 - 180 pF C9, C11, C14 -- 0.1 F Erie Redcap C10 -- 50 F, 50 V C12, C13 -- 680 pF Feedthru D1 -- 1N5925A Motorola Zener
L1 -- #16 AWG, 1-1/4 Turns, 0.213 ID L2 -- #16 AWG, Hairpin L3 -- #14 AWG, Hairpin 0.25 0.062
0.47 0.2 L4 -- 10 Turns #16 AWG Enameled Wire on R1 RFC1 -- 18 Turns #16 AWG Enameled Wire, 0.3 ID R1 -- 10 , 2.0 W R2 -- 1.8 k, 1/2 W R3 -- 10 k, 10 Turn Bourns R4 -- 10 k, 1/4 W
Figure 1. 150 MHz Test Circuit
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140 f = 100 MHz Pout , OUTPUT POWER (WATTS) 120 200 MHz 100 80 60 40 20 0 0 2 4 6 8 10 12 14 VDD = 28 V IDQ = 100 mA 150 MHz Pout , OUTPUT POWER (WATTS)
80 f = 100 MHz 70 60 50 40 30 20 10 0 0 2 4 6 8 10 12 14 16 VDD = 13.5 V IDQ = 100 mA 200 MHz 150 MHz
Pin, INPUT POWER (WATTS)
Pin, INPUT POWER (WATTS)
Figure 2. Output Power versus Input Power
Figure 3. Output Power versus Input Power
160 Pout , OUTPUT POWER (WATTS) Pout , OUTPUT POWER (WATTS) 140 120 100 80 60 40 20 0 12 14 16 18 20 22 24 26 28 VDD, SUPPLY VOLTAGE (VOLTS) 2W 4W IDQ = 100 mA f = 100 MHz Pin = 6 W
160 140 120 100 80 60 40 20 0 12 14 16 18 20 22 24 26 28 VDD, SUPPLY VOLTAGE (VOLTS) 4W IDQ = 100 mA f = 150 MHz
Pin = 12 W 8W
Figure 4. Output Power versus Supply Voltage
Figure 5. Output Power versus Supply Voltage
160 Pout , OUTPUT POWER (WATTS) 140 120 100 80 60 40 20 0 12 14 16 18 20 22 24 26 28 VDD, SUPPLY VOLTAGE (VOLTS) IDQ = 100 mA f = 200 MHz G PS , POWER GAIN (dB) Pin = 16 W 12 W 8W
22 20 18 16 14 12 10 8 6 4 2 20 40 60 80 100 120 140 160 180 200 220 Pout = 125 W VDD = 28 V IDQ = 100 mA
f, FREQUENCY (MHz)
Figure 6. Output Power versus Supply Voltage
Figure 7. Power Gain versus Frequency
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160 Pout , OUTPUT POWER (WATTS) 140 120 100 80 60 40 20 0 -14 TYPICAL DEVICE SHOWN, VGS(th) = 3 V -12 -10 -8 -6 -4 -2 0 2 4 6 VGS, GATE-SOURCE VOLTAGE (VOLTS) f = 150 MHz Pin = CONSTANT IDQ = 100 mA VDD = 28 V
5
I D, DRAIN CURRENT (AMPS)
4
VDS = 10 V
3
2 TYPICAL DEVICE SHOWN, VGS(th) = 3 V 1
0
1
2
3
4
5
6
VGS, GATE-SOURCE VOLTAGE (VOLTS)
Figure 8. Output Power versus Gate Voltage
Figure 9. Drain Current versus Gate Voltage (Transfer Characteristics)
VGS, GATE-SOURCE VOLTAGE (NORMALIZED)
1.2 VDD = 28 V C, CAPACITANCE (pF)
1000 900 800 700 600 500 400 300 200 100 Coss Ciss Crss 0 4 8 12 16 20 VDS, DRAIN-SOURCE VOLTAGE (VOLTS) 24 28 VGS = 0 V f = 1 MHz
1.1
1
ID = 4 A 3A 2A
0.9 100 mA 0.8 - 25
0
25
50
75
100
125
150
175
0
TC, CASE TEMPERATURE (C)
Figure 10. Gate-Source Voltage versus Case Temperature
Figure 11. Capacitance versus Drain Voltage
20 10 I D, DRAIN CURRENT (AMPS) 6 4 2 1 0.6 0.4 0.2 TC = 25C
1
2
4 6 10 20 40 VDS, DRAIN-SOURCE VOLTAGE (VOLTS)
60
100
Figure 12. DC Safe Operating Area
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f (MHz) 2.0 5.0 10 20 30 40 50 60 70 80 90 100 110 120 130 140 150 160 170 180 190 200 210 220 230 240 250 260 270 280 290 300
S11 |S11| 0.932 0.923 0.921 0.921 0.921 0.921 0.922 0.923 0.924 0.925 0.927 0.930 0.930 0.931 0.942 0.936 0.938 0.938 0.940 0.942 0.942 0.952 0.950 0.942 0.943 0.946 0.952 0.958 0.956 0.960 0.956 0.955 - 133 - 160 - 170 - 175 - 177 - 177 - 178 - 178 - 178 - 178 - 178 - 178 - 178 - 178 - 178 - 178 - 178 - 178 - 178 - 178 - 178 - 178 - 178 - 178 - 178 - 177 - 177 - 177 - 177 - 177 - 178 - 178 |S21| 74.0 31.6 16.0 8.00 5.32 3.98 3.17 2.63 2.24 1.95 1.72 1.50 1.31 1.19 1.10 1.01 0.936 0.879 0.830 0.780 0.737 0.705 0.668 0.626 0.592 0.566 0.545 0.523 0.500 0.481 0.460 0.443
S21 112 98 93 88 86 83 81 79 77 75 73 71 70 68 67 66 65 64 63 61 60 59 57 56 56 55 54 53 52 52 51 50 |S12| 0.011 0.011 0.011 0.011 0.011 0.012 0.012 0.012 0.013 0.013 0.014 0.016 0.018 0.019 0.019 0.021 0.021 0.022 0.023 0.024 0.026 0.027 0.029 0.030 0.032 0.033 0.035 0.036 0.038 0.039 0.042 0.043
S12 23 12 10 12 16 21 26 30 34 39 43 45 46 47 49 50 53 53 54 56 59 58 61 61 62 64 64 65 67 68 68 68 |S22| 0.835 0.886 0.896 0.899 0.900 0.901 0.902 0.903 0.904 0.906 0.907 0.910 0.912 0.914 0.919 0.921 0.922 0.923 0.923 0.924 0.928 0.929 0.934 0.933 0.939 0.941 0.943 0.946 0.943 0.946 0.944 0.947
S22 - 151 - 168 - 174 - 177 - 178 - 178 - 178 - 178 - 178 - 178 - 178 - 178 - 178 - 178 - 178 - 178 - 178 - 178 - 177 - 177 - 177 - 177 - 177 - 177 - 177 - 177 - 177 - 177 - 177 - 177 - 177 - 177
Table 1. Common Source Scattering Parameters VDS = 28 V, ID = 3.0 A
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+ j50 + 90 + j25 + j100 + j150 + j10 + j250 + j500 0 300
10 25 50 100 150 250 500 .05
+120 300 250 +150
+ 60
180 - j500 - j250 - j150 -150
.04
.03
.02
.01
200 150 100 50 f = 30 MHz
+ 30
0
f = 30 MHz
- j10
- 30
- j25 - j50
- j100 -120 - 90
- 60
Figure 13. S11, Input Reflection Coefficient versus Frequency VDS = 28 V, ID = 3.0 A
Figure 14. S12, Reverse Transmission Coefficient versus Frequency VDS = 28 V, ID = 3.0 A
+ j50 + 90 +120 50 +150 100 150 300 + 30 + j10 + j250 + j500 0 0 f = 30 MHz 300 - j500 - j10 -150 - 30 - j100 - j50 - j250 - j150 - j25
25 50 100 150 250 500
f = 30 MHz + 60
+ j25
+ j100 + j150
180
5
4
3
2
1
-120 - 90
- 60
Figure 15. S21, Forward Transmission Coefficient versus Frequency VDS = 28 V, ID = 3.0 A
Figure 16. S22, Output Reflection Coefficient versus Frequency VDS = 28 V, ID = 3.0 A
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150 100
f = 200 MHz f = 200 MHz 100 150 ZOL* Pout = 125 W, VDD = 28 V IDQ = 100 mA f MHz Zo = 10 30 100 150 200 Zin Ohms 2.90 - j3.95 1.25 - j2.90 1.18 - j1.40 1.30 - j0.90 ZOL* Ohms 2.95 - j3.90 1.85 - j1.05 1.72 - j0.05 1.70 + j0.25
Zin 30 30
ZOL* = Conjugate of the optimum load impedance ZOL* = into which the device output operates at a ZOL* = given output power, voltage and frequency.
Figure 17. Series Equivalent Input/Output Impedance, Zin, ZOL*
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DESIGN CONSIDERATIONS The MRF174 is a RF power N-Channel enhancement mode field-effect transistor (FET) designed especially for UHF power amplifier and oscillator applications. M/A-COM RF MOSFETs feature a vertical structure with a planar design, thus avoiding the processing difficulties associated with V- groove vertical power FETs. M/A-COM Application Note AN211A, FETs in Theory and Practice, is suggested reading for those not familiar with the construction and characteristics of FETs. The major advantages of RF power FETs include high gain, low noise, simple bias systems, relative immunity from thermal runaway, and the ability to withstand severely mismatched loads without suffering damage. Power output can be varied over a wide range with a low power dc control signal, thus facilitating manual gain control, ALC and modulation. DC BIAS The MRF174 is an enhancement mode FET and, therefore, does not conduct when drain voltage is applied. Drain current flows when a positive voltage is applied to the gate. See Figure 9 for a typical plot of drain current versus gate voltage. RF power FETs require forward bias for optimum performance. The value of quiescent drain current (IDQ) is not critical for many applications. The MRF174 was charac-
terized at IDQ = 100 mA, which is the suggested minimum value of IDQ. For special applications such as linear amplification, IDQ may have to be selected to optimize the critical parameters. The gate is a dc open circuit and draws no current. Therefore, the gate bias circuit may generally be just a simple resistive divider network. Some special applications may require a more elaborate bias system. GAIN CONTROL Power output of the MRF174 may be controlled from its rated value down to zero (negative gain) by varying the dc gate voltage. This feature facilitates the design of manual gain control, AGC/ALC and modulation systems. (See Figure 8.) AMPLIFIER DESIGN Impedance matching networks similar to those used with bipolar UHF transistors are suitable for MRF174. See M/A-COM Application Note AN721, Impedance Matching Networks Applied to RF Power Transistors. The higher input impedance of RF MOSFETs helps ease the task of broadband network design. Both small signal scattering parameters and large signal impedances are provided. While the s-parameters will not produce an exact design solution for high power operation, they do yield a good first approximation. This is an additional advantage of RF MOS power FETs.
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PACKAGE DIMENSIONS
A U M
1
NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH.
Q
M
4
R
B
2
3
D K J H C E
SEATING PLANE
DIM A B C D E H J K M Q R U
INCHES MIN MAX 0.960 0.990 0.465 0.510 0.229 0.275 0.216 0.235 0.084 0.110 0.144 0.178 0.003 0.007 0.435 --- 45 _NOM 0.115 0.130 0.246 0.255 0.720 0.730
MILLIMETERS MIN MAX 24.39 25.14 11.82 12.95 5.82 6.98 5.49 5.96 2.14 2.79 3.66 4.52 0.08 0.17 11.05 --- 45 _NOM 2.93 3.30 6.25 6.47 18.29 18.54
STYLE 2: PIN 1. 2. 3. 4.
SOURCE GATE SOURCE DRAIN
CASE 211-11 ISSUE N
Specifications subject to change without notice. n North America: Tel. (800) 366-2266, Fax (800) 618-8883 n Asia/Pacific: Tel.+81-44-844-8296, Fax +81-44-844-8298 n Europe: Tel. +44 (1344) 869 595, Fax+44 (1344) 300 020
Visit www.macom.com for additional data sheets and product information.
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